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InES Hardware Abstraction Layer
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Representation of SDIO register. More...
#include <reg_stm32f4xx.h>
Data Fields | |
| volatile uint32_t | POWER |
| volatile uint32_t | CLKCR |
| volatile uint32_t | ARG |
| volatile uint32_t | CMD |
| volatile uint32_t | RESPCMD |
| volatile uint32_t | RESP1 |
| volatile uint32_t | RESP2 |
| volatile uint32_t | RESP3 |
| volatile uint32_t | RESP4 |
| volatile uint32_t | DTIMER |
| volatile uint32_t | DLEN |
| volatile uint32_t | DCTRL |
| volatile uint32_t | DCOUNT |
| volatile uint32_t | STA |
| volatile uint32_t | ICR |
| volatile uint32_t | MASK |
| uint32_t | RESERVED [2] |
| volatile uint32_t | FIFOCNT |
| volatile uint32_t | FIFO |
Representation of SDIO register.
Described in reference manual p.1003ff.
| volatile uint32_t reg_sdio_t::ARG |
Argument register.
| volatile uint32_t reg_sdio_t::CLKCR |
Clock control register.
| volatile uint32_t reg_sdio_t::CMD |
Command register.
| volatile uint32_t reg_sdio_t::DCOUNT |
Data counter register.
| volatile uint32_t reg_sdio_t::DCTRL |
Data control register.
| volatile uint32_t reg_sdio_t::DLEN |
Data length register.
| volatile uint32_t reg_sdio_t::DTIMER |
Data timer register.
| volatile uint32_t reg_sdio_t::FIFO |
Data FIFO register.
| volatile uint32_t reg_sdio_t::FIFOCNT |
FIFO count register.
| volatile uint32_t reg_sdio_t::ICR |
Interrupt clear register.
| volatile uint32_t reg_sdio_t::MASK |
Mask register.
| volatile uint32_t reg_sdio_t::POWER |
Power control register.
| volatile uint32_t reg_sdio_t::RESP1 |
Response register 1.
| volatile uint32_t reg_sdio_t::RESP2 |
Response register 2.
| volatile uint32_t reg_sdio_t::RESP3 |
Response register 3.
| volatile uint32_t reg_sdio_t::RESP4 |
Response register 4.
| volatile uint32_t reg_sdio_t::RESPCMD |
Command response register.
| volatile uint32_t reg_sdio_t::STA |
Status register.
1.8.15