InES Hardware Abstraction Layer
Data Fields
reg_ltdc_t Struct Reference

Representation of LTDC register. More...

#include <reg_stm32f4xx.h>

Data Fields

uint32_t RESERVED1 [2]
 
volatile uint32_t SSCR
 
volatile uint32_t BPCR
 
volatile uint32_t AWCR
 
volatile uint32_t TWCR
 
volatile uint32_t GCR
 
volatile uint32_t SRCR
 
volatile uint32_t BCCR
 
volatile uint32_t IER
 
volatile uint32_t ISR
 
volatile uint32_t ICR
 
volatile uint32_t LIPCR
 
volatile uint32_t CPSR
 
volatile uint32_t CDSR
 
uint32_t RESERVED2 [14]
 
reg_ltdc_lc_t LAYER1
 
uint32_t RESERVED3 [15]
 
reg_ltdc_lc_t LAYER2
 

Detailed Description

Representation of LTDC register.

Described in reference manual p.475ff.

Field Documentation

◆ AWCR

volatile uint32_t reg_ltdc_t::AWCR

Active width configuration register.

◆ BCCR

volatile uint32_t reg_ltdc_t::BCCR

Background color conf. register.

◆ BPCR

volatile uint32_t reg_ltdc_t::BPCR

Back porch :D configuration register.

◆ CDSR

volatile uint32_t reg_ltdc_t::CDSR

Current display status register.

◆ CPSR

volatile uint32_t reg_ltdc_t::CPSR

Current position status register.

◆ GCR

volatile uint32_t reg_ltdc_t::GCR

Global configuration register.

◆ ICR

volatile uint32_t reg_ltdc_t::ICR

Interrupt clear register.

◆ IER

volatile uint32_t reg_ltdc_t::IER

Interrupt enable register.

◆ ISR

volatile uint32_t reg_ltdc_t::ISR

Interrupt status register.

◆ LAYER1

reg_ltdc_lc_t reg_ltdc_t::LAYER1

Layer 1 registers.

◆ LAYER2

reg_ltdc_lc_t reg_ltdc_t::LAYER2

Layer 2 registers.

◆ LIPCR

volatile uint32_t reg_ltdc_t::LIPCR

Line interrupt position conf. register.

◆ SRCR

volatile uint32_t reg_ltdc_t::SRCR

Shadow reload configuration register.

◆ SSCR

volatile uint32_t reg_ltdc_t::SSCR

Sync. size configuration register.

◆ TWCR

volatile uint32_t reg_ltdc_t::TWCR

Total width configuration register.


The documentation for this struct was generated from the following file: