|
InES Hardware Abstraction Layer
|
Representation of HASH register. More...
#include <reg_stm32f4xx.h>
Data Fields | |
| volatile uint32_t | CR |
| volatile uint32_t | DIN |
| volatile uint32_t | STR |
| uint32_t | RESERVED1 [5] |
| volatile uint32_t | IMR |
| volatile uint32_t | SR |
| uint32_t | RESERVED2 [48] |
| volatile uint32_t | CSR [54] |
| uint32_t | RESERVED3 [80] |
| volatile uint32_t | HR0 |
| volatile uint32_t | HR1 |
| volatile uint32_t | HR2 |
| volatile uint32_t | HR3 |
| volatile uint32_t | HR4 |
| volatile uint32_t | HR5 |
| volatile uint32_t | HR6 |
| volatile uint32_t | HR7 |
Representation of HASH register.
Described in reference manual p.755ff.
| volatile uint32_t reg_hash_t::CR |
Control register.
| volatile uint32_t reg_hash_t::CSR[54] |
Context swap registers.
| volatile uint32_t reg_hash_t::DIN |
Data input register.
| volatile uint32_t reg_hash_t::HR0 |
Hash digest register 1.
| volatile uint32_t reg_hash_t::HR1 |
Hash digest register 2.
| volatile uint32_t reg_hash_t::HR2 |
Hash digest register 3.
| volatile uint32_t reg_hash_t::HR3 |
Hash digest register 4.
| volatile uint32_t reg_hash_t::HR4 |
Hash digest register 5.
| volatile uint32_t reg_hash_t::HR5 |
Hash digest register 6.
| volatile uint32_t reg_hash_t::HR6 |
Hash digest register 7.
| volatile uint32_t reg_hash_t::HR7 |
Hash digest register 8.
| volatile uint32_t reg_hash_t::IMR |
Interrupt enable register.
| volatile uint32_t reg_hash_t::SR |
Status register.
| volatile uint32_t reg_hash_t::STR |
Start register.
1.8.15