Representation of DAC register. More...

#include <reg_stm32f4xx.h>

Data Fields
volatile uint32_t	CR

volatile uint32_t	SWTRIGR

volatile uint32_t	DHR12R1

volatile uint32_t	DHR12L1

volatile uint32_t	DHR8R1

volatile uint32_t	DHR12R2

volatile uint32_t	DHR12L2

volatile uint32_t	DHR8R2

volatile uint32_t	DHR12RD

volatile uint32_t	DHR12LD

volatile uint32_t	DHR8RD

volatile uint32_t	DOR1

volatile uint32_t	DOR2

volatile uint32_t	SR

Detailed Description

Representation of DAC register.

Described in reference manual p.430ff.

Field Documentation

◆ CR

volatile uint32_t reg_dac_t::CR

Control register.

◆ DHR12L1

volatile uint32_t reg_dac_t::DHR12L1

Ch1 12-bit left-aligned data register.

◆ DHR12L2

volatile uint32_t reg_dac_t::DHR12L2

Ch2 12-bit left-aligned data register.

◆ DHR12LD

volatile uint32_t reg_dac_t::DHR12LD

Dual 12-bit left-aligned data register.

◆ DHR12R1

volatile uint32_t reg_dac_t::DHR12R1

Ch1 12-bit right-aligned data register.

◆ DHR12R2

volatile uint32_t reg_dac_t::DHR12R2

Ch2 12-bit right-aligned data register.

◆ DHR12RD

volatile uint32_t reg_dac_t::DHR12RD

Dual 12-bit right-align. data register.

◆ DHR8R1

volatile uint32_t reg_dac_t::DHR8R1

Ch1 8-bit right-aligned data register.

◆ DHR8R2

volatile uint32_t reg_dac_t::DHR8R2

Ch2 8-bit right-aligned data register.

◆ DHR8RD

volatile uint32_t reg_dac_t::DHR8RD

Dual 8-bit right-aligned data register.

◆ DOR1

volatile uint32_t reg_dac_t::DOR1

Ch1 data output register.

◆ DOR2

volatile uint32_t reg_dac_t::DOR2

Ch2 data output register.

◆ SR

volatile uint32_t reg_dac_t::SR

Status register.

◆ SWTRIGR

volatile uint32_t reg_dac_t::SWTRIGR

Software trigger register.

The documentation for this struct was generated from the following file:

C:/Temp/Git/CT_Board/Software/Keil/uVision_Pack/Content/Device/Include/reg_stm32f4xx.h

Data Fields