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InES Hardware Abstraction Layer
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Representation of CRYP register. More...
#include <reg_stm32f4xx.h>
Data Fields | |
| volatile uint32_t | CR |
| volatile uint32_t | SR |
| volatile uint32_t | DIN |
| volatile uint32_t | DOUT |
| volatile uint32_t | DMACR |
| volatile uint32_t | IMSCR |
| volatile uint32_t | RISR |
| volatile uint32_t | MISR |
| volatile uint32_t | K0LR |
| volatile uint32_t | K0RR |
| volatile uint32_t | K1LR |
| volatile uint32_t | K1RR |
| volatile uint32_t | K2LR |
| volatile uint32_t | K2RR |
| volatile uint32_t | K3LR |
| volatile uint32_t | K3RR |
| volatile uint32_t | IV0LR |
| volatile uint32_t | IV0RR |
| volatile uint32_t | IV1LR |
| volatile uint32_t | IV1RR |
| volatile uint32_t | CSGCMCCM0R |
| volatile uint32_t | CSGCMCCM1R |
| volatile uint32_t | CSGCMCCM2R |
| volatile uint32_t | CSGCMCCM3R |
| volatile uint32_t | CSGCMCCM4R |
| volatile uint32_t | CSGCMCCM5R |
| volatile uint32_t | CSGCMCCM6R |
| volatile uint32_t | CSGCMCCM7R |
| volatile uint32_t | CSGCM0R |
| volatile uint32_t | CSGCM1R |
| volatile uint32_t | CSGCM2R |
| volatile uint32_t | CSGCM3R |
| volatile uint32_t | CSGCM4R |
| volatile uint32_t | CSGCM5R |
| volatile uint32_t | CSGCM6R |
| volatile uint32_t | CSGCM7R |
Representation of CRYP register.
Described in reference manual p.704ff.
| volatile uint32_t reg_cryp_t::CR |
Control register.
| volatile uint32_t reg_cryp_t::CSGCM0R |
Context swap register 1.
| volatile uint32_t reg_cryp_t::CSGCM1R |
Context swap register 2.
| volatile uint32_t reg_cryp_t::CSGCM2R |
Context swap register 3.
| volatile uint32_t reg_cryp_t::CSGCM3R |
Context swap register 4.
| volatile uint32_t reg_cryp_t::CSGCM4R |
Context swap register 5.
| volatile uint32_t reg_cryp_t::CSGCM5R |
Context swap register 6.
| volatile uint32_t reg_cryp_t::CSGCM6R |
Context swap register 7.
| volatile uint32_t reg_cryp_t::CSGCM7R |
Context swap register 8.
| volatile uint32_t reg_cryp_t::CSGCMCCM0R |
Context swap register 1.
| volatile uint32_t reg_cryp_t::CSGCMCCM1R |
Context swap register 2.
| volatile uint32_t reg_cryp_t::CSGCMCCM2R |
Context swap register 3.
| volatile uint32_t reg_cryp_t::CSGCMCCM3R |
Context swap register 4.
| volatile uint32_t reg_cryp_t::CSGCMCCM4R |
Context swap register 5.
| volatile uint32_t reg_cryp_t::CSGCMCCM5R |
Context swap register 6.
| volatile uint32_t reg_cryp_t::CSGCMCCM6R |
Context swap register 7.
| volatile uint32_t reg_cryp_t::CSGCMCCM7R |
Context swap register 8.
| volatile uint32_t reg_cryp_t::DIN |
Data input register.
| volatile uint32_t reg_cryp_t::DMACR |
DMA control register.
| volatile uint32_t reg_cryp_t::DOUT |
Data output register.
| volatile uint32_t reg_cryp_t::IMSCR |
Interrupt mask set/clear register.
| volatile uint32_t reg_cryp_t::IV0LR |
Initialisation vector (left) reg. 1.
| volatile uint32_t reg_cryp_t::IV0RR |
Initialisation vector (right) reg. 1.
| volatile uint32_t reg_cryp_t::IV1LR |
Initialisation vector (left) reg. 2.
| volatile uint32_t reg_cryp_t::IV1RR |
Initialisation vector (right) reg. 2.
| volatile uint32_t reg_cryp_t::K0LR |
Key (left) register 1.
| volatile uint32_t reg_cryp_t::K0RR |
Key (right) register 1.
| volatile uint32_t reg_cryp_t::K1LR |
Key (left) register 2.
| volatile uint32_t reg_cryp_t::K1RR |
Key (right) register 2.
| volatile uint32_t reg_cryp_t::K2LR |
Key (left) register 3.
| volatile uint32_t reg_cryp_t::K2RR |
Key (right) register 3.
| volatile uint32_t reg_cryp_t::K3LR |
Key (left) register 4.
| volatile uint32_t reg_cryp_t::K3RR |
Key (right) register 4.
| volatile uint32_t reg_cryp_t::MISR |
Masked interrupt status register.
| volatile uint32_t reg_cryp_t::RISR |
Raw interrupt status register.
| volatile uint32_t reg_cryp_t::SR |
Status register.
1.8.15