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Timer Clock Source




Configuration register 1




CKD00tDTS ⇒ tCKINT
01tDTS ⇒ 2 · tCKINT
10tDTS ⇒ 4 · tCKINT
11Reserved

Slave mode control register




ETP0ETR is noninverted, active at high level or rising edge (reset state)
1ETR is inverted, active at low level or falling edge
ETPS00Prescaler off (reset state)
01fETRP / 2
10fETRP / 4
11fETRP / 8

The code snippet below shows how to configure and use a GPIO pin as input.

#include "reg_stm32f4xx.h"
 
/* TO-DODELI DOO. */


  • stm32/peripherals/timer_clock.1672214086.txt.gz
  • Last modified: 2022/12/28 07:54
  • by ruan