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RCC: Enable/disable clocks for peripherals and reset peripherals
The peripherals can be controlled by the following 3 register sets:
- The xxxENR registers enable or disable the clocks for the peripherals.
- The xxxLPENR registers enable or disable the clocks for the peripherals in sleep mode.
- The xxxRSTR registers can reset a peripheral.
Configuration Registers
AHB1xxx - AHB1ENR, AHB1LPENR and AHB1RSTR registers
AHB2xxx - AHB2ENR, AHB2LPENR and AHB2RSTR registers
AHB3xxx - AHB3ENR, AHB3LPENR and AHB3RSTR registers
APB1xxx - APB1ENR, APB1LPENR and APB1RSTR registers
APB2xxx - APB2ENR, APB2LPENR and APB2RSTR registers
Register Description
RCC_xxxENR - Peripheral clock enable register
| zEN | 0 | Peripheral clock disabled |
| zEN | 1 | Peripheral clock enabled |
RCC_xxxLPENR Low power clock enable register
| zLPEN | 0 | Peripheral clock disabled during sleep mode |
| zLPEN | 1 | Peripheral clock enabled during sleep mode |
RCC_xxxRSTR - Peripheral reset register
| zLPEN | 0 | Peripheral not reset |
| zLPEN | 1 | Resets peripheral |