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External Interrupts

The EXTI controller consists of 23 edge detectors, which can be configured individually.




0..15EXTI lines 0..15 correspond to the GPIO pins 0..15
16PVD interrupt
17RTC Alarm A & B interrupt
18USB OTG FS interrupt
19Ethernet wakeup
20USB OTG HS interrupt
21Tamper & time stamp interrupt
22RTC wakeup interrupt


#include "reg_stm32f4xx.h"
 
RCC->AHBENR[0] |= (0x1 << 0u);    /* Enable GPIOA clock */
 
/* Configure GPIO pin A.5 as input. */
GPIOA->MODER &= ~(0x3 << 10u);    /* Clear existing mode bits 10 and 11. */
 
GPIOA->PUPDR &= ~(0x3 << 10u);    /* Clear existing pull-up/-down bits 10 and 11. */
GPIOA->PUPDR |= (0x1 << 10u);     /* Set pin 5 to pull-up mode. */


To choose which GPIO peripheral should trigger EXTI line 5 you have to configure the SYSCFG register.

#include "reg_stm32f4xx.h"
 
SYSCFG->EXTICR[1] |= (0u << 4u);  /* Set EXTI5 to GPIOA. */


#include "reg_stm32f4xx.h"
 
EXTI->RTSR |= (0x1 << 5u);         /* Trigger on rising edge. */
EXTI->IMR |= (0x1 << 5u);          /* Unmask interrupt line. */


#include "reg_stm32f4xx.h"
 
NVIC->ISER[0] |= (0x1 << 23u);     /* Enable EXTI5 interrupt. */


EXTICR1

External interrupt configuration register 1




EXTICR2

External interrupt configuration register 2




EXTICR3

External interrupt configuration register 3




EXTICR4

External interrupt configuration register 4




EXTIx0000GPIOA pin x (reset state)
0001GPIOB pin x
1010GPIOK pin x


Rising / falling trigger selection register




TRx0Trigger for EXTI line x disabled (reset state)
1Trigger for EXTI line x enabled


Interrupt mask register




MRx0Interrupt request for EXTI line x masked (reset state)
1Interrupt request for EXTI line x unmasked


Pending register




PRx*0No trigger request occurred
1Selected trigger request occured

* This bit is set when the selected edge event arrives on the external interrupt line x. This bis is cleared by programming it to '1'

  • stm32/peripherals/exti.1539151438.txt.gz
  • Last modified: 2018/10/10 06:03
  • by kjaz