STOP Mode

In STOP mode only the cpu clock is disabled, everything else stays as previously configured.

• WFI (wait for interrupt) instruction with SLEEPDEEP bit set enters STOP mode.

• Clear the EXTI (and, if not EXTI, the corresponding NVIC) pending bit.

The code snippet bellow shows how to enter (and exit) STOP mode.

#include "reg_stm32f4xx.h"
 
RCC->AHB1ENR |= (0x1 <<  0u);       /* Enable GPIOA clock */
RCC->APB2ENR |= (0x1 << 14u);       /* Enable SYSCFG clock */
 
/* Configure wake up pin (PA.0). */
GPIOA->MODER &= ~(0x3 << 0u);         /* Clear existing mode bits 10 and 11. */
 
GPIOA->PUPDR &= ~(0x3 << 0u);         /* Clear existing pull-up/-down bits 0 and 1. */
GPIOA->PUPDR |= (0x1 << 0u);          /* Set pin 0 to pull-up mode. */
 
/* Configure interrupt. */
SYSCFG->EXTICR1 |= (0u << 0u);      /* Set EXTI0 to GPIOA. */
EXTI->RTSR |= (0x1 << 0u);            /* Trigger on rising edge. */
EXTI->IMR |= (0x1 << 0u);             /* Unmask interrupt line. */
NVIC->ISER0 |= (0x1 << 6u);         /* Enable EXTI0 interrupt. */
 
 
/* -------------------- Enter STOP mode -------------------- */
 
 
    /* Clear PDDS -> Enter STOP when DEEPSLEEP */
    PWR->CR &= ~(0x1 << 1u);
 
    /* Clear LPDS -> Main voltage regulator when STOP */
    PWR->CR &= ~(0x1 << 0u);
 
    /* Set SLEEPDEEP bit to enter DEEPSLEEP */
    SCB->SCR |= (0x1 << 2u);
 
    /* Enter low power mode */
    __asm volatile ("wfi");
 
    /* Reset SLEEPDEEP bit after wakeup */
    SCB->SCR &= ~(0x1 << 2u);
 
 
/* -------------------- Exit STOP mode --------------------- */
 
/* Since all registers and the SRAM are untouched by the STOP mode,
 * the program continues after the WFI instruction.
 * 
 * The system clock (and therefore most oscillators) where disabled
 * in the STOP mode, as well as all peripherals. 
 * The system clock needs to be reconfigured and all used peripherals
 * need to be re-enabled after exiting STOP mode.
 */