====== Register Data Types ======

To access the registers in an easy manner they are mapped to a data structure. \\
A pointer of this type then points to the register's physical address. \\ \\

  * The [[#stm32f429zi_registries|registers of the STM32F429ZI]] are represented with [[#struct|structs]].
  * The [[#ct_board_registries|registers of the CT Board]] are represented mostly with a combination of [[#struct|structs]] and [[#union|unions]].
\\

===== Basics =====

==== Struct ====

A [[http://www.tutorialspoint.com/cprogramming/c_structures.htm|struct]] is a combined data type of its member types. \\

\\ {{type_struct.svg}} \\ \\

==== Union ====

A [[http://www.tutorialspoint.com/cprogramming/c_unions.htm|union]] is an other form of a combined data type. \\

\\ {{type_union.svg}} \\ \\

===== STM32F429ZI Registers =====

Below is the definition of the [[stm32:peripherals:gpio|GPIO]] registers to illustrate the concept. \\

<code c>typedef struct {
    volatile uint32_t MODER;    /**< Port mode register. */
    volatile uint32_t OTYPER;   /**< Output type register. */
    volatile uint32_t OSPEEDR;  /**< Output speed register. */
    volatile uint32_t PUPDR;    /**< Port pull-up/pull-down register. */
    volatile uint32_t IDR;      /**< Input data register. */
    volatile uint32_t ODR;      /**< output data register. */
    volatile uint16_t BSRR[2];  /**< [0]: Bit set register, 
                                     [1]: Bit reset register. */
    volatile uint32_t LCKR;     /**< Port lock register. */
    volatile uint32_t AFR[2];   /**< [0]: Alternate Function register pin 0..7, 
                                     [1]: Alternate Function register pin 8..15. */
} reg_gpio_t;

#define GPIOA   ((reg_gpio_t *) 0x40020000)
#define GPIOB   ((reg_gpio_t *) 0x40020400)
#define GPIOC   ((reg_gpio_t *) 0x40020800)
#define GPIOD   ((reg_gpio_t *) 0x40020c00)
#define GPIOE   ((reg_gpio_t *) 0x40021000)
#define GPIOF   ((reg_gpio_t *) 0x40021400)
#define GPIOG   ((reg_gpio_t *) 0x40021800)
#define GPIOH   ((reg_gpio_t *) 0x40021c00)
#define GPIOI   ((reg_gpio_t *) 0x40022000)
#define GPIOJ   ((reg_gpio_t *) 0x40022400)
#define GPIOK   ((reg_gpio_t *) 0x40022800)
</code>
\\

The GPIO register is mapped to the data type ''reg_gpio_t''. \\
For every GPIO port exists a macro, which is simply a pointer of the type ''reg_gpio_t'' pointing to the registers address. \\
For convenience there is a special operator ''<nowiki>-></nowiki>'' to dereference a struct (or union) pointer:
<code c>
GPIOA->ODR = (0x1 << 8u);       /* Operator -> to dereference a struct or union. */
</code>
\\

===== CT Board Registers =====

The registers of the STM32F429ZI are mostly for configuration purposes, while the registers of the CT Board are mostly holding some kind of data. The data in the CT Board registers can be accessed using different widths, eg. ''uint32_t'' for all DIP switches or ''uint8_t'' for only S7..0. \\

\\ {{type_combined.svg}} \\ \\

Below is the definition of the [[ctboard:peripherals:dipsw|DIPSW]] register to illustrate the concept. \\

<code c>typedef union {
    struct {
        volatile uint8_t S7_0;      /**< Switch 7..0. */
        volatile uint8_t S15_8;     /**< Switch 15..8. */
        volatile uint8_t S23_16;    /**< Switch 23..16. */
        volatile uint8_t S31_24;    /**< Switch 31..0. */
    } BYTE;
    struct {
        volatile uint16_t S15_0;    /**< Switch 15..0. */
        volatile uint16_t S31_16;   /**< Switch 31..16. */
    } HWORD;
    volatile uint32_t WORD;         /**< Switch 31..0. */
} reg_ct_dipsw_t;

#define CT_DIPSW    ((reg_ct_dipsw_t *) 0x60000200)
</code>
\\

The CT_DIPSW register can be accessed using either ''uint8_t'' (byte), ''uint16_t'' (halfword) or ''uint32_t'' (word) pointers:

<code c>
uint8_t data_byte = CT_DIPSW->BYTE.S7_0;
uint16_t data_halfword = CT_DIPSW->HWORD.S15_0;
uint32_t data_word = CT_DIPSW->WORD;
</code>