====== GPIO ======

The CT Board offers on the 4 general purpose ports the following functions:
  * 4 general purpose I/O ports
    * 32 memory mapped output pins
    * 32 memory mapped input pins
  * 2 general purpose I/O ports, directly connected to MCUs [[stm32:peripherals:gpio|Port A and B]]
  * External interface to [[memory_bus|SRAM bus]].
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===== Functions =====

These modes are available:

  * [[gpio_cpld|GPIO over CPLD]] for input / output on ports P1..4.
  * [[gpio_mcu|GPIO over MCU]] for input / output on ports P5 / P6.