Show pageOld revisionsBacklinksBack to top This page is read only. You can view the source, but not change it. Ask your administrator if you think this is wrong. ====== GPIO ====== The CT Board offers on the 4 general purpose ports the following functions: * 4 general purpose I/O ports * 32 memory mapped output pins * 32 memory mapped input pins * 2 general purpose I/O ports, directly connected to MCUs [[stm32:peripherals:gpio|Port A and B]] * External interface to [[memory_bus|SRAM bus]]. \\ ===== Functions ===== These modes are available: * [[gpio_cpld|GPIO over CPLD]] for input / output on ports P1..4. * [[gpio_mcu|GPIO over MCU]] for input / output on ports P5 / P6. ctboard/peripherals/gpio.txt Last modified: 2017/08/29 09:19by ruan