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stm32:peripherals:timer_compare [2022/12/28 07:58] – ruanstm32:peripherals:timer_compare [2022/12/28 08:00] (current) – ruan
Line 5: Line 5:
 ===== Configuration Registers ===== ===== Configuration Registers =====
  
-==== CCMR1/2 ==== +==== TIMx_CCMR1/2 - Capture/compare mode register 1/2 ====
- +
-Capture/compare mode register 1/2+
  
 \\ {{timer_reg_ccmr1.svg}} {{timer_reg_ccmr2.svg}} \\ \\ \\ {{timer_reg_ccmr1.svg}} {{timer_reg_ccmr2.svg}} \\ \\
Line 47: Line 45:
 |::: |  |//*Note: CCxS bits are writable only when the channel is OFF (CCxE = ‘0’ in TIMx_CCER).//| |::: |  |//*Note: CCxS bits are writable only when the channel is OFF (CCxE = ‘0’ in TIMx_CCER).//|
  
-==== DIER ==== +==== TIMx_DIER - DMA / Interrupt enable register ====
- +
-DMA / Interrupt enable register+
  
 \\ {{timer_reg_dier.svg}} \\ \\ \\ {{timer_reg_dier.svg}} \\ \\
Line 59: Line 55:
 |:::  |1|CCx interrupt enabled| |:::  |1|CCx interrupt enabled|
  
-==== CCER ==== +==== TIMx_CCER - Capture/compare enable register ====
- +
-Capture/compare enable register+
  
 \\ {{timer_reg_ccer.svg}} \\ \\ \\ {{timer_reg_ccer.svg}} \\ \\
Line 76: Line 70:
 |::: |1|Capture/compare output x enabled| |::: |1|Capture/compare output x enabled|
  
-==== CCRx ==== +==== TIMx_CCRx - Capture/compare enable register ====
- +
-Capture/compare enable register+
  
 \\ {{timer_reg_ccrx.svg}} \\ \\ \\ {{timer_reg_ccrx.svg}} \\ \\
Line 85: Line 77:
 |CCRx|15:0|Capture/Compare value| |CCRx|15:0|Capture/Compare value|
  
-==== BDTR ==== +==== TIMx_BDTR - Break and dead-time register ====
- +
-Break and dead-time register+
  
 \\ {{timer_reg_bdtr.svg}} \\ \\ \\ {{timer_reg_bdtr.svg}} \\ \\
  • stm32/peripherals/timer_compare.1672214285.txt.gz
  • Last modified: 2022/12/28 07:58
  • by ruan