Differences

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--- stm32:peripherals:timer_compare [2022/12/28 07:57] – [Programming Example] ruan
+++ stm32:peripherals:timer_compare [2022/12/28 08:00] (current) – ruan
@@ Line 2: / Line 2: @@
 \\ {{timer_output.svg}} \\ \\
-===== Programming Example =====
-The code snippet below shows how to configure and use a GPIO pin as input.
-<code c>
-#include "reg_stm32f4xx.h"
-RCC->AHBENR[0] |= (0x1 << 0u);          /* Enable GPIOA clock */
-RCC->APBENR[0] |= (0x1 << 0u);          /* Enable TIM2 clock */
-/* configure output */
-GPIOA->MODER |= (0x2 << 0u);          /* Set pin 0 to Alternate Function */
-GPIOA->AFR[0] |= (0x1 << 0u);         /* Set pin 0 to AF1 (TIM2) */
-/* configure basic timer */
-TIM2->PSC = 84000u - 1u;              /* Counting with f = 84MHz / 84000 = 1MHz */
-TIM2->ARR = 512u;                     /* Count to 512 */
-/* configure timer output */
-TIM2->CCMR1 |= (0x6 << 4u);           /* Enable PWM mode 1 on channel 1 */
-TIM2->CCER |= (0x1 << 0u);            /* Enable output on channel 1 */
-TIM2->CR1 |= (0x1 << 0u);             /* Start timer */
-</code>
-\\
 ===== Configuration Registers =====
-==== CCMR1/2 ====
+==== TIMx_CCMR1/2 - Capture/compare mode register 1/2 ====
-Capture/compare mode register 1/2
 \\ {{timer_reg_ccmr1.svg}} {{timer_reg_ccmr2.svg}} \\ \\
@@ Line 73: / Line 45: @@
 |::: |  |//*Note: CCxS bits are writable only when the channel is OFF (CCxE = ‘0’ in TIMx_CCER).//|
-==== DIER ====
+==== TIMx_DIER - DMA / Interrupt enable register ====
-DMA / Interrupt enable register
 \\ {{timer_reg_dier.svg}} \\ \\
@@ Line 85: / Line 55: @@
 |:::  |1|CCx interrupt enabled|
-==== CCER ====
+==== TIMx_CCER - Capture/compare enable register ====
-Capture/compare enable register
 \\ {{timer_reg_ccer.svg}} \\ \\
@@ Line 102: / Line 70: @@
 |::: |1|Capture/compare output x enabled|
-==== CCRx ====
+==== TIMx_CCRx - Capture/compare enable register ====
-Capture/compare enable register
 \\ {{timer_reg_ccrx.svg}} \\ \\
@@ Line 111: / Line 77: @@
 |CCRx|15:0|Capture/Compare value|
-==== BDTR ====
+==== TIMx_BDTR - Break and dead-time register ====
-Break and dead-time register
 \\ {{timer_reg_bdtr.svg}} \\ \\
@@ Line 121: / Line 85: @@
 |:::|1| OC and OCN outputs are enabled if their respective enable bits are set (CCxE, CCxNE in TIMx_CCER register).|
-===== Legend =====
+===== Programming Example =====
-\\ {{legende.svg}} \\ \\
+The code snippet below shows how to configure and use a GPIO pin as input.
+<code c>
+#include "reg_stm32f4xx.h"
+RCC->AHBENR[0] |= (0x1 << 0u);          /* Enable GPIOA clock */
+RCC->APBENR[0] |= (0x1 << 0u);          /* Enable TIM2 clock */
+/* configure output */
+GPIOA->MODER |= (0x2 << 0u);          /* Set pin 0 to Alternate Function */
+GPIOA->AFR[0] |= (0x1 << 0u);         /* Set pin 0 to AF1 (TIM2) */
+/* configure basic timer */
+TIM2->PSC = 84000u - 1u;              /* Counting with f = 84MHz / 84000 = 1MHz */
+TIM2->ARR = 512u;                     /* Count to 512 */
+/* configure timer output */
+TIM2->CCMR1 |= (0x6 << 4u);           /* Enable PWM mode 1 on channel 1 */
+TIM2->CCER |= (0x1 << 0u);            /* Enable output on channel 1 */
+TIM2->CR1 |= (0x1 << 0u);             /* Start timer */
+</code>
+\\