Differences

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--- stm32:peripherals:rcc_peripherals [2022/12/27 19:12] – [Enable/disable clocks for peripherals and reset peripherals] ruan
+++ stm32:peripherals:rcc_peripherals [2022/12/27 19:24] (current) – [RCC: Enable/disable clocks for peripherals and reset peripherals] ruan
@@ Line 1: / Line 1: @@
-====== RCC: Enable/disable clocks for peripherals and reset peripherals ======
+====== RCC Enable/disable clocks for peripherals and reset peripherals ======
 The peripherals can be controlled by the following 3 register sets:
-  * The [[#xxxENR]] registers enable or disable the clocks for the peripherals.
+  * The [[#RCC_xxxxENR - Peripheral clock enable registers]] enable or disable the clocks for the peripherals.
-  * The [[#xxxLPENR]] registers enable or disable the clocks for the peripherals in sleep mode.
+  * The [[#RCC_xxxxLPENR Low power clock enable registers]] enable or disable the clocks for the peripherals in sleep mode.
-  * The [[#xxxRSTR]] registers can reset a peripheral.
+  * The [[#RCC_xxxxRSTR - Peripheral reset registers]] can reset a peripheral.
 \\ {{clock_peripherals.svg}} \\ \\
@@ Line 12: / Line 12: @@
 \\
-==== AHB1xxx ====
+==== AHB1xxx - AHB1ENR, AHB1LPENR and AHB1RSTR registers ====
-AHB1ENR, AHB1LPENR and AHB1RSTR registers
 \\ {{clock_reg_ahb1_r.svg}} \\ \\
-==== AHB2xxx ====
+==== AHB2xxx - AHB2ENR, AHB2LPENR and AHB2RSTR registers ====
-AHB2ENR, AHB2LPENR and AHB2RSTR registers
 \\ {{clock_reg_ahb2_r.svg}} \\ \\
-==== AHB3xxx ====
+==== AHB3xxx - AHB3ENR, AHB3LPENR and AHB3RSTR registers ====
-AHB3ENR, AHB3LPENR and AHB3RSTR registers
 \\ {{clock_reg_ahb3_r.svg}} \\ \\
-==== APB1xxx ====
+==== APB1xxx - APB1ENR, APB1LPENR and APB1RSTR registers ====
-APB1ENR, APB1LPENR and APB1RSTR registers
 \\ {{clock_reg_apb1_r.svg}} \\ \\
-==== APB2xxx ====
+==== APB2xxx - APB2ENR, APB2LPENR and APB2RSTR registers ====
-APB2ENR, APB2LPENR and APB2RSTR registers
 \\ {{clock_reg_apb2_r.svg}} \\ \\
@@ Line 45: / Line 35: @@
 \\
-==== xxxENR ====
+==== RCC_xxxxENR - Peripheral clock enable registers ====
-Enable register \\ \\
+ \\ \\
 |< 100% 5em 5em >|
@@ Line 53: / Line 43: @@
 |zEN|1|Peripheral clock enabled|
-==== xxxLPENR ====
+==== RCC_xxxxLPENR Low power clock enable registers ====
-Low power enable register \\ \\
+ \\ \\
 |< 100% 5em 5em >|
@@ Line 61: / Line 51: @@
 |zLPEN|1|Peripheral clock enabled during sleep mode|
-==== xxxRSTR ====
+==== RCC_xxxxRSTR - Peripheral reset registers ====
-Reset register \\ \\
+ \\ \\
 |< 100% 5em 5em >|