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stm32:peripherals:pwr_stop_new [2016/11/08 07:17] – created feurstm32:peripherals:pwr_stop_new [2019/09/16 07:23] (current) – [Programming Example] kjaz
Line 21: Line 21:
 #include "reg_stm32f4xx.h" #include "reg_stm32f4xx.h"
  
-RCC->AHBENR[0] |= (0x1 <<  0u);       /* Enable GPIOA clock */ +RCC->AHB1ENR |= (0x1 <<  0u);       /* Enable GPIOA clock */ 
-RCC->APBENR[1] |= (0x1 << 14u);       /* Enable SYSCFG clock */+RCC->APB2ENR |= (0x1 << 14u);       /* Enable SYSCFG clock */
  
 /* Configure wake up pin (PA.0). */ /* Configure wake up pin (PA.0). */
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 /* Configure interrupt. */ /* Configure interrupt. */
-SYSCFG->EXTICR[0] |= (0u << 0u);      /* Set EXTI0 to GPIOA. */+SYSCFG->EXTICR1 |= (0u << 0u);      /* Set EXTI0 to GPIOA. */
 EXTI->RTSR |= (0x1 << 0u);            /* Trigger on rising edge. */ EXTI->RTSR |= (0x1 << 0u);            /* Trigger on rising edge. */
 EXTI->IMR |= (0x1 << 0u);             /* Unmask interrupt line. */ EXTI->IMR |= (0x1 << 0u);             /* Unmask interrupt line. */
-NVIC->ISER[0] |= (0x1 << 6u);         /* Enable EXTI0 interrupt. */+NVIC->ISER0 |= (0x1 << 6u);         /* Enable EXTI0 interrupt. */
  
  
  • stm32/peripherals/pwr_stop_new.1478589436.txt.gz
  • Last modified: 2016/11/08 07:17
  • by feur