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stm32:peripherals:interrupt_table [2016/03/02 13:55] – created feurstm32:peripherals:interrupt_table [2016/10/03 09:43] (current) feur
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 |< 100% 5em 5em 10em 10em >| |< 100% 5em 5em 10em 10em >|
 ^  IRQ  ^  Priority  ^ ^ Address  ^ ^  IRQ  ^  Priority  ^ ^ Address  ^
-| |  -3  | Reset | 0x0000'0004 || +| |  -3 | Reset | 0x0000'0004 || 
-| |  -2  | NMI | 0x0000'0008 | Non maskable interrupt | +| |  -2 | NMI | 0x0000'0008 | Non maskable interrupt | 
-| |  -1  | HardFault | 0x0000'000c ||+| |  -1 | HardFault | 0x0000'000c ||
 | |  0  | MemManage | 0x0000'0010 | MPU missmatch | | |  0  | MemManage | 0x0000'0010 | MPU missmatch |
 | |  1  | BusFault | 0x0000'0014 | Prefetch fault, memory access fault | | |  1  | BusFault | 0x0000'0014 | Prefetch fault, memory access fault |
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 | |  3  | SVCall | 0x0000'002c | System service call via SWI instruction | | |  3  | SVCall | 0x0000'002c | System service call via SWI instruction |
 | |  4  | Debug Monitor | 0x0000'0030 || | |  4  | Debug Monitor | 0x0000'0030 ||
-| |  5  | PendSV | 0x0000'0038 || +| |  5  | PendSV | 0x0000'0038 | Pendable request for system service 
-| |  6  | SysTick | 0x0000'003c ||+| |  6  | [[SysTick]] | 0x0000'003c | System tick timer |
 |  0  |  7  | WWDG | 0x0000'0040 | Windowed Watchdog | |  0  |  7  | WWDG | 0x0000'0040 | Windowed Watchdog |
-|  1  |  8  | PVD | 0x0000'0044 ||+|  1  |  8  | PVD | 0x0000'0044 | PVD through EXTI line detection interrupt |
 |  2  |  9  | TP_TS | 0x0000'0048 | Tamper and Timestamp interrupts | |  2  |  9  | TP_TS | 0x0000'0048 | Tamper and Timestamp interrupts |
 |  3  |  10  | RTC_WKUP | 0x0000'004c | Real time clock wake up interrupt | |  3  |  10  | RTC_WKUP | 0x0000'004c | Real time clock wake up interrupt |
 |  4  |  11  | FLASH | 0x0000'0050 | Flash global interrupt | |  4  |  11  | FLASH | 0x0000'0050 | Flash global interrupt |
-|  5  |  12  | RCC | 0x0000'0054 | RCC global interrupt | +|  5  |  12  | [[RCC]] | 0x0000'0054 | RCC global interrupt | 
-|  6  |  13  | EXTI0 | 0x0000'0058 | EXTI line 0 | +|  6  |  13  | [[gpio|EXTI0]] | 0x0000'0058 | EXTI line 0 interrupt 
-|  7  |  14  | EXTI1 | 0x0000'005c | EXTI line 1 | +|  7  |  14  | [[gpio|EXTI1]] | 0x0000'005c | EXTI line 1 interrupt 
-|  8  |  15  | EXTI2 | 0x0000'0060 | EXTI line 2 | +|  8  |  15  | [[gpio|EXTI2]] | 0x0000'0060 | EXTI line 2 interrupt 
-|  9  |  16  | EXTI3 | 0x0000'0064 | EXTI line 3 | +|  9  |  16  | [[gpio|EXTI3]] | 0x0000'0064 | EXTI line 3 interrupt 
-|  10  |  17  | EXTI4 | 0x0000'0068 | EXTI line 4 | +|  10  |  17  | [[gpio|EXTI4]] | 0x0000'0068 | EXTI line 4 interrupt 
-|  11  |  18  | DMA1_Stream0 | 0x0000'006c | DMA1 stream 0 | +|  11  |  18  | DMA1_Stream0 | 0x0000'006c | DMA 1 stream 0 interrupt 
-|  12  |  19  | DMA1_Stream1 | 0x0000'0070 | DMA1 stream 1 | +|  12  |  19  | DMA1_Stream1 | 0x0000'0070 | DMA 1 stream 1 interrupt 
-|  13  |  20  | DMA1_Stream2 | 0x0000'0074 | DMA1 stream 2 | +|  13  |  20  | DMA1_Stream2 | 0x0000'0074 | DMA 1 stream 2 interrupt 
-|  14  |  21  | DMA1_Stream3 | 0x0000'0078 | DMA1 stream 3 | +|  14  |  21  | DMA1_Stream3 | 0x0000'0078 | DMA 1 stream 3 interrupt 
-|  15  |  22  | DMA1_Stream4 | 0x0000'007c | DMA1 stream 4 | +|  15  |  22  | DMA1_Stream4 | 0x0000'007c | DMA 1 stream 4 interrupt 
-|  16  |  23  | DMA1_Stream5 | 0x0000'0080 | DMA1 stream 5 | +|  16  |  23  | DMA1_Stream5 | 0x0000'0080 | DMA 1 stream 5 interrupt 
-|  17  |  24  | DMA1_Stream6 | 0x0000'0084 | DMA1 stream 6 | +|  17  |  24  | DMA1_Stream6 | 0x0000'0084 | DMA 1 stream 6 interrupt 
-|  18  |  25  | ADC | 0x0000'0088 | ADC1..3 global interrupt |+|  18  |  25  | [[ADC]] | 0x0000'0088 | ADC1..3 global interrupt |
 |  19  |  26  | CAN1_TX | 0x0000'008c | CAN1 TX interrupt | |  19  |  26  | CAN1_TX | 0x0000'008c | CAN1 TX interrupt |
 |  20  |  27  | CAN1_RX0 | 0x0000'0090 | CAN1 RX0 interrupt | |  20  |  27  | CAN1_RX0 | 0x0000'0090 | CAN1 RX0 interrupt |
 |  21  |  28  | CAN1_RX1 | 0x0000'0094 | CAN1 RX1 interrupt | |  21  |  28  | CAN1_RX1 | 0x0000'0094 | CAN1 RX1 interrupt |
 |  22  |  29  | CAN1_SCE | 0x0000'0098 | CAN1 SCE interrupt | |  22  |  29  | CAN1_SCE | 0x0000'0098 | CAN1 SCE interrupt |
-|  23  |  30  | EXTI9_5 | 0x0000'009c || +|  23  |  30  | [[gpio|EXTI9_5]] | 0x0000'009c | EXTI line 5..9 interrupt
-|  24  |  31  | TIM1_BRK_TIM9 | 0x0000'00a0 || +|  24  |  31  | TIM1_BRK \\ TIM9 | 0x0000'00a0 | Timer 1 Break interrupt \\ Timer 9 global interrupt 
-|  25  |  32  | TIM1_UP_TIM10 | 0x0000'00a4 || +|  25  |  32  | TIM1_UP \\ TIM10 | 0x0000'00a4 | Timer 1 Update interrupt \\ Timer 10 global interrupt 
-|  26  |  33  | TIM1_TRG_COM_TIM11 | 0x0000'00a8 || +|  26  |  33  | TIM1_TRG_COM \\ TIM11 | 0x0000'00a8 | Timer 1 trigger and communication interrupt \\ Timer 11 global interrupt 
-|  27  |  34  | TIM1_CC | 0x0000'00ac || +|  27  |  34  | TIM1_CC | 0x0000'00ac | Timer 1 capture compare interrupt 
-|  28  |  35  | TIM2 | 0x0000'00b0 || +|  28  |  35  | [[timer|TIM2]] | 0x0000'00b0 | Timer 2 global interrupt 
-|  29  |  36  | TIM3 | 0x0000'00b4 || +|  29  |  36  | [[timer|TIM3]] | 0x0000'00b4 | Timer 3 global interrupt 
-|  30  |  37  | TIM4 | 0x0000'00b8 || +|  30  |  37  | [[timer|TIM4]] | 0x0000'00b8 | Timer 4 global interrupt 
-|  31  |  38  | I2C1_EV | 0x0000'00bc || +|  31  |  38  | I2C1_EV | 0x0000'00bc | I²C 1 event interrupt 
-|  32  |  39  | I2C1_ER | 0x0000'00c0 || +|  32  |  39  | I2C1_ER | 0x0000'00c0 | I²C 1 error interrupt 
-|  33  |  40  | I2C2_EV | 0x0000'00c4 || +|  33  |  40  | I2C2_EV | 0x0000'00c4 | I²C 2 event interrupt 
-|  34  |  41  | I2C2_ER | 0x0000'00c8 || +|  34  |  41  | I2C2_ER | 0x0000'00c8 | I²C 2 error interrupt 
-|  35  |  42  | SPI1 | 0x0000'00cc || +|  35  |  42  | [[spi|SPI1]] | 0x0000'00cc | SPI 1 global interrupt 
-|  36  |  43  | SPI2 | 0x0000'00d0 || +|  36  |  43  | [[spi|SPI2]] | 0x0000'00d0 |SPI 2 global interrupt 
-|  37  |  44  | USART1 | 0x0000'00d4 || +|  37  |  44  | [[usart|USART1]] | 0x0000'00d4 | USART 1 global interrupt 
-|  38  |  45  | USART2 | 0x0000'00d8 || +|  38  |  45  | [[usart|USART2]] | 0x0000'00d8 | USART 2 global interrupt 
-|  39  |  46  | USART3 | 0x0000'00dc || +|  39  |  46  | [[usart|USART3]] | 0x0000'00dc | USART 3 global interrupt 
-|  40  |  47  | EXTI15_10 | 0x0000'00e0 || +|  40  |  47  | [[gpio|EXTI15_10]] | 0x0000'00e0 | EXTI line 10..15 interrupt 
-|  41  |  48  | RTC_Alarm | 0x0000'00e4 || +|  41  |  48  | RTC_Alarm | 0x0000'00e4 | Real time clock alarm interrupt 
-|  42  |  49  | USB_FS_WKUP | 0x0000'00e8 || +|  42  |  49  | USB_FS_WKUP | 0x0000'00e8 | USB full speed wake up interrupt 
-|  43  |  50  | TIM8_BRK_TIM12 | 0x0000'00ec || +|  43  |  50  | TIM8_BRK \\ TIM12 | 0x0000'00ec | Timer 8 break interrupt \\ Timer 12 global interrupt 
-|  44  |  51  | TIM8_UP_TIM13 | 0x0000'00f0 || +|  44  |  51  | TIM8_UP \\ TIM13 | 0x0000'00f0 | Timer 8 update interrupt \\ Timer 13 global interrupt 
-|  45  |  52  | TIM8_TRG_COM_TIM14 | 0x0000'00f4 || +|  45  |  52  | TIM8_TRG_COM \\ TIM14 | 0x0000'00f4 | Timer 8 trigger and communication interrupt \\ Timer 14 global interrupt 
-|  46  |  53  | TIM8_CC | 0x0000'00f8 || +|  46  |  53  | TIM8_CC | 0x0000'00f8 | Timer 8 capture compare interrupt 
-|  47  |  54  | DMA1_Stream7 | 0x0000'00fc || +|  47  |  54  | DMA1_Stream7 | 0x0000'00fc | DMA 1 stream 7 interrupt 
-|  48  |  55  | FMC | 0x0000'0100 || +|  48  |  55  | FMC | 0x0000'0100 | FMC global interrupt 
-|  49  |  56  | SDIO | 0x0000'0104 || +|  49  |  56  | SDIO | 0x0000'0104 | SDIO global interrupt 
-|  50  |  57  | TIM5 | 0x0000'0108 || +|  50  |  57  | [[timer|TIM5]] | 0x0000'0108 | Timer 5 global interrupt 
-|  51  |  58  | SPI3 | 0x0000'010c || +|  51  |  58  | [[spi|SPI3]] | 0x0000'010c | SPI 3 global interrupt 
-|  52  |  59  | UART4 | 0x0000'0110 || +|  52  |  59  | [[usart|UART4]] | 0x0000'0110 | UART 4 global interrupt 
-|  53  |  60  | UART5 | 0x0000'0114 || +|  53  |  60  | [[usart|UART5]] | 0x0000'0114 | UART 5 global interrupt 
-|  54  |  61  | TIM6_DAC | 0x0000'0118 || +|  54  |  61  | TIM6 \\ [[DAC]] | 0x0000'0118 | Timer 6 global interrupt \\ DAC 1/2 global interrupt 
-|  55  |  62  | TIM7 | 0x0000'011c || +|  55  |  62  | TIM7 | 0x0000'011c | Timer 7 global interrupt 
-|  56  |  63  | DMA2_Stream0 | 0x0000'0120 | DMA2 stream 0 | +|  56  |  63  | DMA2_Stream0 | 0x0000'0120 | DMA 2 stream 0 interrupt 
-|  57  |  64  | DMA2_Stream1 | 0x0000'0124 | DMA2 stream 1 | +|  57  |  64  | DMA2_Stream1 | 0x0000'0124 | DMA 2 stream 1 interrupt 
-|  58  |  65  | DMA2_Stream2 | 0x0000'0128 | DMA2 stream 2 | +|  58  |  65  | DMA2_Stream2 | 0x0000'0128 | DMA 2 stream 2 interrupt 
-|  59  |  66  | DMA2_Stream3 | 0x0000'012c | DMA2 stream 3 | +|  59  |  66  | DMA2_Stream3 | 0x0000'012c | DMA 2 stream 3 interrupt 
-|  60  |  67  | DMA2_Stream4 | 0x0000'0130 | DMA2 stream 4 | +|  60  |  67  | DMA2_Stream4 | 0x0000'0130 | DMA 2 stream 4 interrupt 
-|  61  |  68  | ETH | 0x0000'0134 || +|  61  |  68  | ETH | 0x0000'0134 | Ethernet global interrupt 
-|  62  |  69  | ETH_WKUP | 0x0000'0138 ||+|  62  |  69  | ETH_WKUP | 0x0000'0138 | Ethernet wakeup interrupt |
 |  63  |  70  | CAN2_TX | 0x0000'013c | CAN2 TX interrupt | |  63  |  70  | CAN2_TX | 0x0000'013c | CAN2 TX interrupt |
 |  64  |  71  | CAN2_RX0 | 0x0000'0140 | CAN2 RX0 interrupt | |  64  |  71  | CAN2_RX0 | 0x0000'0140 | CAN2 RX0 interrupt |
 |  65  |  72  | CAN2_RX1 | 0x0000'0144 | CAN2 RX1 interrupt | |  65  |  72  | CAN2_RX1 | 0x0000'0144 | CAN2 RX1 interrupt |
 |  66  |  73  | CAN2_SCE | 0x0000'0148 | CAN2 SCE interrupt | |  66  |  73  | CAN2_SCE | 0x0000'0148 | CAN2 SCE interrupt |
-|  67  |  74  | USB_FS | 0x0000'014c || +|  67  |  74  | USB_FS | 0x0000'014c | USB full speed interrupt 
-|  68  |  75  | DMA2_Stream5 | 0x0000'0150 | DMA2 stream 5 | +|  68  |  75  | DMA2_Stream5 | 0x0000'0150 | DMA 2 stream 5 interrupt 
-|  69  |  76  | DMA2_Stream6 | 0x0000'0154 | DMA2 stream 6 | +|  69  |  76  | DMA2_Stream6 | 0x0000'0154 | DMA 2 stream 6 interrupt 
-|  70  |  77  | DMA2_Stream7 | 0x0000'0158 | DMA2 stream 7 | +|  70  |  77  | DMA2_Stream7 | 0x0000'0158 | DMA 2 stream 7 interrupt 
-|  71  |  78  | USART6 | 0x0000'015c || +|  71  |  78  | [[usart|USART6]] | 0x0000'015c || 
-|  72  |  79  | I2C3_EV | 0x0000'0160 || +|  72  |  79  | I2C3_EV | 0x0000'0160 | I²C 3 event interrupt 
-|  73  |  80  | I2C3_ER | 0x0000'0164 || +|  73  |  80  | I2C3_ER | 0x0000'0164 | I²C 3 error interrupt 
-|  74  |  81  | USB_HS_EP1_OUT | 0x0000'0168 || +|  74  |  81  | USB_HS_EP1_OUT | 0x0000'0168 | USB high speed end point 1 out interrupt 
-|  75  |  82  | USB_HS_EP1_IN | 0x0000'016c || +|  75  |  82  | USB_HS_EP1_IN | 0x0000'016c | USB high speed end point 1 in interrupt 
-|  76  |  83  | USB_HS_WKUP | 0x0000'0170 || +|  76  |  83  | USB_HS_WKUP | 0x0000'0170 | USB high speed wake up interrupt 
-|  77  |  84  | USB_HS | 0x0000'0174 || +|  77  |  84  | USB_HS | 0x0000'0174 | USB high speed global interrupt 
-|  78  |  85  | DCMI | 0x0000'0178 || +|  78  |  85  | DCMI | 0x0000'0178 | DCMI global interrupt 
-|  79  |  86  | CRYPT | 0x0000'017c || +|  79  |  86  | CRYPT | 0x0000'017c | Crypto global interrupt 
-|  80  |  87  | HASH_RNG | 0x0000'0180 || +|  80  |  87  | HASH_RNG | 0x0000'0180 | HASH and RNG global interrupt 
-|  81  |  88  | FPU | 0x0000'0184 || +|  81  |  88  | FPU | 0x0000'0184 | Floating point global interrupt 
-|  82  |  89  | UART7 | 0x0000'0188 || +|  82  |  89  | [[usart|UART7]] | 0x0000'0188 | UART 7 global interrupt 
-|  83  |  90  | UART8 | 0x0000'018c || +|  83  |  90  | [[usart|UART8]] | 0x0000'018c | UART 8 global interrupt 
-|  84  |  91  | SPI4 | 0x0000'0190 || +|  84  |  91  | [[spi|SPI4]] | 0x0000'0190 | SPI 4 global interrupt 
-|  85  |  92  | SPI5 | 0x0000'0194 || +|  85  |  92  | [[spi|SPI5]] | 0x0000'0194 | SPI 5 global interrupt 
-|  86  |  93  | SPI6 | 0x0000'0198 || +|  86  |  93  | [[spi|SPI6]] | 0x0000'0198 | SPI 6 global interrupt 
-|  87  |  94  | SAI1 | 0x0000'019c || +|  87  |  94  | SAI1 | 0x0000'019c | SAI 1 global interrupt 
-|  88  |  95  | LCD | 0x0000'01a0 || +|  88  |  95  | LCD | 0x0000'01a0 | LTDC global interrupt 
-|  89  |  96  | LCD_ERR | 0x0000'01a4 || +|  89  |  96  | LCD_ERR | 0x0000'01a4 | LTDC error interrupt 
-|  90  |  97  | DMA2D | 0x0000'01a8 ||+|  90  |  97  | DMA2D | 0x0000'01a8 | DMA2D global interrupt | 
 + 
 +* Priority **not** changeable
  • stm32/peripherals/interrupt_table.1456926940.txt.gz
  • Last modified: 2016/03/02 13:55
  • by feur