Differences
This shows you the differences between two versions of the page.
| Both sides previous revision Previous revision Next revision | Previous revision | ||
| stm32:peripherals:gpio_output [2016/02/25 08:51] – [MODER] feur | stm32:peripherals:gpio_output [2022/12/28 08:17] (current) – ruan | ||
|---|---|---|---|
| Line 10: | Line 10: | ||
| \\ {{gpio_output.svg}} \\ \\ | \\ {{gpio_output.svg}} \\ \\ | ||
| - | ===== Programming | + | ===== Programming |
| - | The code snippet bellow shows how to configure and use a GPIO pin as output. | + | ==== Enable Peripheral ==== |
| - | <code c> | + | Make sure the peripheral is enabled: |
| - | #include " | + | * Enable GPIOx in '' |
| - | /* Configure GPIO pin A.5 as output. */ | + | ==== Setup output |
| - | GPIOA-> | + | |
| - | GPIOA-> | + | |
| - | GPIOA->PUPDR &= ~(0x3 << 10u); /* Clear existing | + | Configure the MODE and PUPDR as well as the output type and speed register, \\ for every pin that should act as digital output: |
| - | GPIOA-> | + | * Write '' |
| - | + | | |
| - | GPIOA-> | + | |
| - | + | | |
| - | GPIOA->OSPEEDR &= ~(0x3 << 10u); /* Clear existing | + | |
| - | GPIOA-> | + | |
| - | + | ||
| - | /* Write to GPIO pin A.5. */ | + | |
| - | GPIOA-> | + | |
| - | + | ||
| - | GPIOA-> | + | |
| - | GPIOA-> | + | |
| - | </ | + | |
| \\ | \\ | ||
| ===== Configuration Registers ===== | ===== Configuration Registers ===== | ||
| - | ==== MODER ==== | + | ==== GPIOx_MODER - Port mode register |
| - | + | ||
| - | Mode register | + | |
| \\ {{gpio_reg_common.svg}} \\ \\ | \\ {{gpio_reg_common.svg}} \\ \\ | ||
| |< 100% 5em 5em >| | |< 100% 5em 5em >| | ||
| - | |Pin x|01|Output mode (reset state)| | + | |Pin x|01|Output mode| |
| - | ==== PUPDR ==== | + | ==== GPIOx_PUPDR - Port pull-up / pull-down register |
| - | + | ||
| - | Push-up / pull-down register | + | |
| \\ {{gpio_reg_common.svg}} \\ \\ | \\ {{gpio_reg_common.svg}} \\ \\ | ||
| Line 60: | Line 45: | ||
| |::: | |::: | ||
| - | ==== OTYPER | + | ==== GPIOx_OTYPER - Port output type register |
| - | + | ||
| - | Output type register | + | |
| \\ {{gpio_reg_otyper.svg}} \\ \\ | \\ {{gpio_reg_otyper.svg}} \\ \\ | ||
| Line 70: | Line 53: | ||
| |::: | |::: | ||
| - | ==== OSPEEDR | + | ==== GPIOx_OSPEEDR - Port output speed register |
| - | + | ||
| - | Output speed register | + | |
| \\ {{gpio_reg_common.svg}} \\ \\ | \\ {{gpio_reg_common.svg}} \\ \\ | ||
| Line 84: | Line 65: | ||
| ===== Data Registers ===== | ===== Data Registers ===== | ||
| - | ==== ODR ==== | + | ==== GPIOx_ODR - Port output data register |
| - | + | ||
| - | Output data register | + | |
| \\ {{gpio_reg_odr.svg}} \\ \\ | \\ {{gpio_reg_odr.svg}} \\ \\ | ||
| Line 94: | Line 73: | ||
| |:::|1|Set pin x| | |:::|1|Set pin x| | ||
| - | ==== BSRR ==== | + | ==== GPIOx_BSRR Port bit set / reset register |
| - | + | ||
| - | Bit set / reset register | + | |
| \\ {{gpio_reg_bsrr.svg}} \\ \\ | \\ {{gpio_reg_bsrr.svg}} \\ \\ | ||
| Line 106: | Line 83: | ||
| |::: | |::: | ||
| - | ===== Legend ===== | ||
| - | |||
| - | \\ {{legende.svg}} \\ \\ | ||