Differences
This shows you the differences between two versions of the page.
Both sides previous revision Previous revision Next revision | Previous revision | ||
stm32:peripherals:exti [2019/09/16 07:25] – [Setup NVIC] kjaz | stm32:peripherals:exti [2022/12/28 08:29] (current) – [SYSCFG_EXTICR4 - External interrupt configuration register 4] ruan | ||
---|---|---|---|
Line 17: | Line 17: | ||
|22|RTC wakeup interrupt| | |22|RTC wakeup interrupt| | ||
\\ | \\ | ||
+ | |||
+ | |||
+ | |||
+ | ===== Configuration Register ===== | ||
+ | |||
+ | ==== SYSCFG_EXTICR1 - External interrupt configuration register 1 ==== | ||
+ | |||
+ | \\ {{syscfg_reg_exticr1.svg}} \\ \\ | ||
+ | |||
+ | ==== SYSCFG_EXTICR2 - External interrupt configuration register 2 ==== | ||
+ | |||
+ | \\ {{syscfg_reg_exticr2.svg}} \\ \\ | ||
+ | |||
+ | ==== SYSCFG_EXTICR3 - External interrupt configuration register 3 ==== | ||
+ | |||
+ | \\ {{syscfg_reg_exticr3.svg}} \\ \\ | ||
+ | |||
+ | ==== SYSCFG_EXTICR4 - External interrupt configuration register 4 ==== | ||
+ | |||
+ | \\ {{syscfg_reg_exticr4.svg}} \\ \\ | ||
+ | |||
+ | Select the source input for EXTI | ||
+ | |< 100% 5em 5em >| | ||
+ | |EXTIx|0000|GPIOA pin x (reset state)| | ||
+ | |::: | ||
+ | |:::|...| | ||
+ | |::: | ||
+ | \\ | ||
+ | |||
+ | ==== EXTI_RTSR / EXTI_FTSR | ||
+ | |||
+ | \\ {{exti_reg_xtsr.svg}} \\ \\ | ||
+ | |||
+ | |< 100% 5em 5em >| | ||
+ | |TRx|0|Trigger for EXTI line x disabled (reset state)| | ||
+ | |::: | ||
+ | \\ | ||
+ | |||
+ | ==== EXTI_IMR - Interrupt mask register ==== | ||
+ | |||
+ | \\ {{exti_reg_imr.svg}} \\ \\ | ||
+ | |||
+ | |< 100% 5em 5em >| | ||
+ | |MRx|0|Interrupt request for EXTI line x masked (reset state)| | ||
+ | |::: | ||
+ | \\ | ||
+ | |||
+ | ==== EXTI_PR - Pending register ==== | ||
+ | |||
+ | \\ {{exti_reg_pr.svg}} \\ \\ | ||
+ | |||
+ | |< 100% 5em 5em >| | ||
+ | |PRx*|0|No trigger request occurred| | ||
+ | |::: | ||
+ | * This bit is set when the selected edge event arrives on the external interrupt line x. This bis is cleared by programming it to ' | ||
===== Programming Example ===== | ===== Programming Example ===== | ||
Line 64: | Line 119: | ||
</ | </ | ||
\\ | \\ | ||
- | |||
- | ===== Configuration Register ===== | ||
- | |||
- | ==== SYSCFG - EXTICRx ==== | ||
- | |||
- | === EXTICR1 === | ||
- | |||
- | External interrupt configuration register 1 | ||
- | |||
- | \\ {{syscfg_reg_exticr1.svg}} \\ \\ | ||
- | |||
- | === EXTICR2 === | ||
- | |||
- | External interrupt configuration register 2 | ||
- | |||
- | \\ {{syscfg_reg_exticr2.svg}} \\ \\ | ||
- | |||
- | === EXTICR3 === | ||
- | |||
- | External interrupt configuration register 3 | ||
- | |||
- | \\ {{syscfg_reg_exticr3.svg}} \\ \\ | ||
- | |||
- | === EXTICR4 === | ||
- | |||
- | External interrupt configuration register 4 | ||
- | |||
- | \\ {{syscfg_reg_exticr4.svg}} \\ \\ | ||
- | |||
- | |< 100% 5em 5em >| | ||
- | |EXTIx|0000|GPIOA pin x (reset state)| | ||
- | |::: | ||
- | |:::|...| | ||
- | |::: | ||
- | \\ | ||
- | |||
- | ==== EXTI - RTSR / FTSR ==== | ||
- | |||
- | Rising / falling trigger selection register | ||
- | |||
- | \\ {{exti_reg_xtsr.svg}} \\ \\ | ||
- | |||
- | |< 100% 5em 5em >| | ||
- | |TRx|0|Trigger for EXTI line x disabled (reset state)| | ||
- | |::: | ||
- | \\ | ||
- | |||
- | ==== EXTI - IMR ==== | ||
- | |||
- | Interrupt mask register | ||
- | |||
- | \\ {{exti_reg_imr.svg}} \\ \\ | ||
- | |||
- | |< 100% 5em 5em >| | ||
- | |MRx|0|Interrupt request for EXTI line x masked (reset state)| | ||
- | |::: | ||
- | \\ | ||
- | |||
- | ==== EXTI - PR ==== | ||
- | |||
- | Pending register | ||
- | |||
- | \\ {{exti_reg_pr.svg}} \\ \\ | ||
- | |||
- | |< 100% 5em 5em >| | ||
- | |PRx*|0|No trigger request occurred| | ||
- | |::: | ||
- | * This bit is set when the selected edge event arrives on the external interrupt line x. This bis is cleared by programming it to ' | ||